IEEE

19.10 A 4.6GHz ${63.3}\text{fs}_{\text{rms}}$ PLL-XO Co-Design Using a Self-Aligned Pulse-Injection Driver Achieving −255.2dB $\text{FoM}_{\mathrm{J}}$ Including the XO Power ...

With the advancements in low-noise-circuit techniques, phase-locked loops (PLLs) have been pushing their jitter figure of merits $ (\text {FoM}_ {\mathrm {J}})$ to ...
IEEE

A Low Phase Noise PLL Design Based on Self-Injected Locking and In-Loop Mixing Technique

Abstract: In this letter, a combined technique of self-injection locking and in-loop mixing (SIL-MIX) is applied to a phase-locked loop (PLL) frequency synthesizer, which significantly reduces the ...