Semiconductor Engineering

Research Bits: Mar. 9

Researchers from Ulsan National Institute of Science and Technology (UNIST) designed a low power semiconductor circuit ...
Tech Xplore

New study reveals low-power, noiseless clock circuit

A research team affiliated with UNIST has announced the successful development of a novel semiconductor circuit capable of ...
IEEE

A Compact 238–278-GHz Frequency Sextupler Based on a Single Bootstrapped Gilbert Cell

Abstract: We present an integrated frequency multiplier-by-six (sextupler) for signal generation at J-band (220–325 GHz) frequencies. Typically, multiplication-by-six in state-of-the-art designs is ...
EurekAlert!

A new design of parity preserving reversible multipliers based on multiple-control Toffoli synthesis targeting emerging quantum circuits

With the increase in fabrication density over the last few decades, semiconductor technology is being pushed to extreme limits and power dissipation has become a major issue. Researchers have been ...
EDN

Power Tips #136: Design an active clamp circuit for rectifiers at a high switching frequency

In vehicle electrical systems, a high- to low-voltage DC/DC converter is a reversible electronic device that changes the DC from the vehicle’s high-voltage (400 V or 800 V) battery to a lower DC ...
EDN

20-42 GHz MMIC Frequency Multiplier

Frequency multipliers are essential to generate a high frequency, low phase-noise signal from a low frequency, high performance oscillator. Figure 1 shows a phase noise comparison between a signal ...
Scientific Research Publishing

P. F. Stelling and V. G. Oklobdzija, “Optimal Circuits for Parallel Multipliers,” IEEE Transactions on Computers, Vol. 47, No. 3, 1998, pp. 273-285. doi:10.1109/12.660163

ABSTRACT: The advances of digital arithmetic techniques permit computer designers to implement high speed application specific chips. The currently produced digital circuits have demonstrated high ...